Effect of lattice mismatch on gate lag in high quality InAlN/AlN/GaN HFET structures

J. H. Leach*, M. Wu, X. Ni, X. Li, Ü . Ö zgür, and H. Morkoç
Department of Electrical and Computer Engineering, Virginia Commonwealth University, Richmond VA, 23284, USA

The field effect transistors were fabricated using Ti/Al/Ni/Au Ohmic contacts followed by etched mesa isolation in a SAMCO inductively coupled plasma (ICP) etch tool using a Cl-based chemistry.
System used in the research: SAMCO ICP Etching System RIE-101iPH